Padma Shri 2026: Prof V Kamakoti’s Legacy

Building India’s Digital Backbone: The Legacy of Prof V Kamakoti and the Padma Shri Honor

When the Government of India announced the Padma Shri Awards 2026, the recognition of Professor V. Kamakoti, Director of IIT Madras, stood out as a signal moment for India’s technology story—not only because it honoured a single academic leader, but because it acknowledged a decades-long push to build critical digital capabilities at home. In a period when every economy is reassessing supply chains, cyber risk, and the real meaning of “trusted technology,” such recognition matters because it highlights the people and institutions doing the hard, unglamorous work of building foundations rather than simply shipping apps. Prof Kamakoti himself framed the award as a commitment to put his best efforts toward “Viksit Bharat 2047” and stressed that what he has achieved is the outcome of collective effort—an emphasis that mirrors how national technology capacity is actually built: team by team, lab by lab, project by project.

For the ai world organisation, this moment is also a timely opportunity to shape a larger conversation about India’s next phase of deep-tech growth—one that links semiconductors, cybersecurity, and applied AI into a coherent national strategy. Platforms like the ai world summit are increasingly where policy, industry, researchers, and startup ecosystems converge to turn technical capability into deployable outcomes, and the ai world organisation events can use such milestones to spotlight the leaders and programs moving India from dependency to resilience. In other words, the story of Prof Kamakoti is not only about honours and headlines; it is about what it takes to create a digital backbone strong enough to support Digital Public Infrastructure, national security systems, financial rails, future industry, and AI at scale.

The Journey of an Academic Leader Who Stayed to Build

Prof V. Kamakoti’s path is deeply rooted in IIT Madras, where he studied and later became faculty, eventually taking over as Director in 2022. This kind of leadership arc matters because it reflects institutional memory and continuity: a leader who understands not only the science but also the long timelines, failure cycles, and patient mentorship needed to turn research into national capability. Reports around the Padma Shri 2026 recognition have highlighted his impact across computer science and systems engineering, and how his work aligns with India’s self-reliance ambitions in strategic technologies.

That alignment is not accidental. India’s technology goals have steadily moved from “adopt and adapt” to “design, verify, and own” in areas where trust, security, and sovereignty are non-negotiable. In this context, the significance of an IIT director being honoured for science and technology is not merely ceremonial; it reinforces a national narrative that academic institutions are not just teaching factories but also builders of strategic infrastructure. And it underlines a broader truth: when a country aims to become a global technology powerhouse, it needs leaders who can bridge academic excellence, industrial relevance, and public-purpose delivery without reducing everything to short-term metrics.

At the ai world summit 2025 / 2026, these are exactly the kinds of themes that deserve centre stage: what does it mean to build trusted compute in a world where AI is accelerating, cyber threats are intensifying, and geopolitical risk increasingly shows up as supply-chain risk? The ai world organisation has an opportunity to frame Prof Kamakoti’s recognition as a case study in nation-building leadership—one that is as much about ecosystem creation as it is about individual brilliance.

Microprocessor Sovereignty: Why Shakti and MDP Matter

If you want a single phrase that captures why Prof Kamakoti’s work is strategically consequential, it is this: control over core computing technology. The Microprocessor Development Programme (MDP), funded by the Ministry of Electronics and Information Technology (MeitY), has been positioned as a mission to design and develop, indigenously, a family of microprocessors, related IPs, and the complete ecosystem needed to enable fully indigenous product development across strategic, industrial, and commercial requirements. That mission statement is not bureaucratic language—it is a blueprint for reducing a nation’s exposure to supply restrictions, hidden vulnerabilities, licensing choke points, and the kind of “black box dependence” that weakens both security and bargaining power.

This is why the Shakti microprocessor initiative has become such an important reference point in India’s semiconductor narrative. Shakti is widely described as an open-source initiative at IIT Madras (RISE group) to develop indigenous, production-grade processor designs and related ecosystem components, including SoCs and development platforms. Under the MeitY-backed ecosystem approach, the goal is not just to produce one chip, but to create a repeatable pathway—from architecture and RTL to verification, tooling, boards, software stacks, and real deployments. The same ecosystem logic is what turns a “lab demo” into a capability that industries and government agencies can actually rely on.

India’s broader MDP landscape has also been discussed in terms of multiple parallel processor efforts. One policy explainer notes that IIT Madras and C-DAC developed SHAKTI (32-bit) and VEGA (64-bit) using open-source architecture under the aegis of the MeitY Microprocessor Development Programme. The same source points out that MDP was approved in August 2017 with a multi-year budget outlay and that multiple institutions were roped in for implementation, underscoring that the initiative was designed as a national program rather than a single-institute project. Even without getting lost in the funding numbers, the strategic logic is clear: you can’t claim digital sovereignty if the “brain” of your critical systems is permanently imported and opaque.

What makes this particularly relevant in 2026 is that microprocessors are no longer “just hardware.” Modern national systems—banking, markets, identity rails, telecom, defence platforms, and increasingly AI workloads—are software-defined, networked, and update-driven, which makes the trustworthiness of the compute base a first-order concern. The more your economy depends on digitised services, the more microprocessor security, verification, and supply chain integrity move from technical details to national policy priorities. This is also where India’s RISC-V trajectory matters, because open instruction set architectures can enable more transparent ecosystems and greater domestic control—if the surrounding toolchains, verification discipline, and manufacturing pathways are built seriously.

The Digital India RISC-V (DIR-V) program is one of the clearest public markers of that seriousness. A PIB release from April 2022 describes India launching the Digital India RISC-V program for next-generation microprocessors with an aim to achieve commercial silicon and design wins by December 2023, and it highlights intended partnerships across startups, academia, and global majors. It also notes India’s plan to take a premier board membership of RISC-V International, positioning the country not just as a user but as a contributor and advocate in the global RISC-V ecosystem. Whether every timeline target lands perfectly or not, the direction is unmistakable: India is building a formal national pathway to become a supplier of trusted compute, not merely a consumer.

For the ai world organisation, these developments are not distant policy topics—they are the substrate for every serious AI conversation. If AI is the “new electricity,” then microprocessors, accelerators, embedded chips, and secure compute platforms are the grid. The ai world summit and ai conferences by ai world can use this moment to connect the dots for attendees: how semiconductor design capability shapes AI adoption cost, data centre competitiveness, and the ability to deploy AI responsibly in sensitive sectors. In practical terms, such sessions help industry leaders move from abstract “AI strategy” talk to a grounded understanding of the compute stack and what “trusted by design” should mean in procurement and architecture choices.

Cybersecurity and the Culture of Digital Trust

No digital backbone is complete without cybersecurity capacity that goes beyond tools and becomes a culture. This is where Prof Kamakoti’s association with information security initiatives becomes an essential second pillar of the story. India’s Information Security Education and Awareness (ISEA) project is described as aiming toward human resources development for safe, trusted, and secure cyberspace. Another implementing-agency page for ISEA Phase II describes the objective as capacity building in information security, including training of government personnel and mass information security awareness, along with the creation of a national repository of courses to design countermeasures against attacks. Put simply, it is not only about responding to incidents; it is about building skilled people and repeatable knowledge pathways so that security scales with digitisation.

Security programs of this nature matter even more in an AI-heavy future. As AI systems become embedded in decision-making, customer service, credit, hiring, and critical infrastructure operations, the attack surface changes: you’re no longer defending only servers and networks, but also models, data pipelines, prompt interfaces, third-party integrations, and opaque supply chains. The implication for India is straightforward: digital sovereignty requires both indigenous compute and indigenous competence in security, testing, auditing, and incident response. When people talk about “trustworthy AI,” they often start and stop at ethics; in reality, trust also depends on the practical discipline of cybersecurity, governance, and resilience engineering.

Institutional capability-building is visible in how IIT Madras has supported dedicated cybersecurity research ecosystems. In 2024, IIT Madras announced the inauguration of its Centre for Cybersecurity, Trust and Reliability (CyStar), and the institute’s note includes a statement from Prof V. Kamakoti emphasising the need for proactive cyber defence mechanisms in light of targeted attacks on critical infrastructure. The same announcement describes CyStar’s mission as pushing boundaries through innovative research and education, highlighting a multi-disciplinary approach. This kind of centre-level investment is significant because cybersecurity is not a single-subject problem; it demands cryptography, systems, hardware security, usable security, policy, and human factors working together.

From the standpoint of the ai world summit, this cybersecurity dimension is also where event programming can become exceptionally practical. The ai world organisation events can curate discussions that bring semiconductor designers, CISOs, policymakers, and AI leaders into one room to talk about the real integration points: secure boot, trusted execution, hardware roots of trust, post-quantum readiness, and how to audit AI pipelines in regulated sectors. That is not just “thought leadership”; it is the kind of cross-functional collaboration that helps India’s digital infrastructure stay reliable as it scales and as adversaries become more sophisticated.

India’s Semiconductor Momentum and What Comes Next

India’s semiconductor story is now broadening from design competence to include more visible manufacturing and packaging steps, and that context strengthens why microprocessor initiatives like Shakti and national programs like DIR-V resonate. In March 2025, ISRO described VIKRAM3201 as the first fully “Make-in-India” 32-bit microprocessor qualified for use in the harsh environmental conditions of launch vehicles, fabricated at the 180nm CMOS fab of Semiconductor Laboratory (SCL). Coverage around Semicon India 2025 also reported that India’s indigenously built Vikram-32 chip was presented at the event and connected the milestone to India’s broader semiconductor self-reliance goals.

What this signals is not that India has “solved semiconductors” overnight, but that the ecosystem is producing credible, validated milestones across strategic applications. As more such milestones accumulate, they can influence everything from talent retention to procurement confidence to private capital appetite for deep-tech ventures. And that creates a feedback loop: validated chips and programs lead to stronger ecosystems, which lead to better chips, better security, and more deployable products.

India is also making visible moves in compound semiconductors—an area that matters for EVs, power electronics, and high-efficiency energy systems. A PIB release from August 2025 states that the Cabinet approved semiconductor manufacturing units including an integrated facility of Silicon Carbide (SiC) based compound semiconductors in Bhubaneswar, Odisha, describing it as the first commercial compound fab in the country and noting that the project proposes to manufacture Silicon Carbide devices. This is an important strategic detail because it suggests India is not only chasing mainstream silicon narratives but also positioning itself in emerging, high-impact niches where demand is accelerating.

For the ai world organisation, this broader semiconductor momentum is relevant because it reframes India’s AI future in more grounded terms. AI adoption is frequently described as a software problem, but at scale it is just as much a compute economics problem: who controls the hardware roadmap, who can secure the stack end-to-end, and who can deploy systems resiliently across real-world constraints. In that environment, leaders who have helped develop indigenous microprocessor ecosystems and security capacity become symbols of a deeper national transition—from being a global talent pool to also being a builder of global-grade infrastructure.

This is also why the Padma Shri 2026 recognition should be read as an ecosystem signal, not a personal headline. Reports on the award have highlighted Prof Kamakoti’s emphasis on collective effort, and that framing is both accurate and instructive: semiconductor design, verification, fabrication, and secure deployment are team sports with long horizons. The honour becomes a way of publicly validating the value of persistence—of staying with a hard, multi-year program even when quicker wins are available elsewhere.

From our perspective at the ai world summit, this story offers a strong narrative arc for 2026 programming. The ai world organisation can use it to bring a sharper focus to “India’s digital backbone” as an integrated stack: indigenous compute programs like MDP and DIR-V, strategic validation milestones like VIKRAM3201, and national-scale cybersecurity capacity building through ISEA and research centres like CyStar. And by doing so, ai conferences by ai world can move the conversation beyond hype cycles and toward the practical systems thinking India needs to lead in AI responsibly and competitively.

Finally, there is a human element that should not be lost. Honours like the Padma Shri can inspire younger engineers and researchers to believe that deep, foundational work is valued—and that building within India, for India, can be a path not only to impact but also to national recognition. If we want a durable digital backbone, we need more people choosing the hard work of foundations: chip design, secure systems, standards, education, and institution-building. Prof V. Kamakoti’s Padma Shri 2026 is best understood as a spotlight on that foundation-building mindset—and as a reminder that the future belongs to ecosystems that can design, build, secure, and scale.